Integrated thin film capacitors are desirable for power supply regulation of high performance electronic devices such as MOS and bipolar chips and other types of semiconductors. Specific capacitance required now is in the order of 50 nF/cm.sup.2, and is expected to increase as still higher performance electronics become available. Integrating the capacitor into the substrate (on which the chips are mounted or which provides the interconnect between chips) is desirable because it would provide more usable area for the devices and would minimize the parasitic inductance between the chips and the capacitor. Even preferable would be to integrate the capacitor directly onto the chips themselves. However, the prime problem in fabricating such a capacitor is in the presence of point defects which short out the capacitor.
The present invention describes an apparatus and method for fabricating capacitors with specific capacitance much higher than is required near term, with high yield. The basic principle is to fabricate two capacitors in series: M1-I1-M2-I2-M3, where M refers to metal and I refers to a thin, high dielectric constant insulator. In addition, the middle metal film M2 is patterned into many, for example, a million, of individual isolated regions. This structure then provides a plurality of small area capacitors connected in parallel in which each capacitor consists of two capacitors in series. The entire structure will then be good so long as there are no simultaneous defects in both I1 and I2 at the same small area capacitor.